1. Field of the Invention
The present invention relates to a method of bonding a semiconductor chip to a substrate.
2. Description of the Prior Art
U.S. Pat. No. 3,600,246 to J. Breen describes a method of making laminated semiconductor devices. The Breen patent describes, as a first step in its process, the application of a bonding cement to a semiconductor wafer while the bonding cement is in a viscous condition. Two methods which can be used to apply the adhesive include the silk screening of the adhesive onto the wafer or the application of a layer of the adhesive by means of a spatula or the like. Following application of the adhesive to the wafer, it is heated to convert it from a viscous state to a non-tacky, relatively firm state. The conversion of the adhesive to such a state facilitates the further handling of the wafer, e.g., the scribing and testing of the wafer, or simple storage of the wafer, without having the wafer stick to the various operating and handling means that might be employed. When it is desired to reconvert the cement to an adhesive state preparatory to the bonding of a chip to a desired substrate, the cooled, non-tacky cement can be reconverted to such a viscous state by a subsequent heating step, which, if continued long enough, causes curing of the cement.
Published European Patent Application No. 134,606, published Mar. 20, 1985, describes a carrier film containing a non-viscous conductive adhesive for the dicing of semiconductor wafers. This disclosure was limited to provision of a support film containing a releasably bonded adhesive which would support a semiconductor wafer during its dicing. The adhesive would be either dried or partially cured to a suitable tacky state so that the wafer could be attached thereto preparatory to the dicing operation. The disclosure of this patent publication merely calls for the dicing of the semiconductor wafer while it is on the adhesive with the removal of the adherent adhesive, while still in the tacky state, and the subsequent placement of the resultant chip and adherent adhesive layer on a chip support.